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Cache design resilient to contention-based side-channel attack
Background Shared caches are vulnerable to side channel attacks through contention in cache sets. Contention attacks, as opposed to reuse attacks, depend on having a shared cache between the attacker and the victim and do not require the presence of shared memory. Existing solutions to prevent these attacks resort to partitioning or hiding the mapping...
Published: 5/7/2024
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Inventor(s):
Sandhya Dwarkadas
,
Divya Ojha
Keywords(s):
Category(s):
Computer Hardware
Flexible, Decoupled Hardware-Accelerated Transactional Memory
This is a new architecture for multi-processor computers using transactional memory.ApplicationsToday’s multi-core computers require explicit parallel programming, which is difficult. This transactional memory (TM) system can be used in computers with multi-core processors to reduce programming complexity and increase parallel program scalability.AdvantagesCurrent...
Published: 5/7/2024
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Inventor(s):
Sandhya Dwarkadas
,
Arrvindh Shriraman
,
Michael Scott
Keywords(s):
Category(s):
Computer Software