Sigma-Delta Analog to Digital Converter Architecture Based upon a Novel Modulator Design Employing a Mirrored Integrator

This technology provides an improved analog to digital converter (ADC) for lower noise, increased resolution and stability, reduced power consumption and smaller device size.



This analog to digital converter (ADC) will compete with the conventional sigma delta ADC designs for high resolution applications because of both dynamic range and power reasons, and with other ADC types in certain applications because of its low power requirements.



In the new architecture, the frequency spectrum of the input signal is reflected about one-half the Nyquist frequency so that a signal near dc is shifted up to near the Nyquist frequency. The"Mirrored Integrator" in the modulator has the added benefit of suppressing all the even order terms of non-linearity in the DAC. The essence of the new approach is to control circuit noise by shifting the input signal to the upper frequency range of the spectrum. The output signal is then passed through a high-pass filter (in opposition to a conventional sigma-delta converter in which the signal is passed through a low-pass filter). After filtering, the signal is decimated by employing the procedure used in conventional sigma-delta converters. The noise-shaping property of the new architecture "pushes" noise toward the low-frequency portion of the spectrum, which is already cluttered with the 1/f noise, DAC non-linearity and op amp and quantizer harmonic distortion. All this low-frequency noise is then filtered out by the high-pass filter to produce an overall improvement in resolution over the conventional sigma delta ADC design.


Compared to a conventional sigma delta ADC, this approach has the following advantages:

·         Improved dynamic range; Reduced offset error and drift;

·         Dramatically lower power consumption per bit, allowing the design tradeoff of over sampling rate for resolution;

·         Smaller size circuits because smaller input transistors can be used, because of the noise reduction features of the design;

·         Reduced analog noise; Reduced operational amplifier analog noise (thermal + 1/f);

·         Suppression of DAC nonlinearity;

·         Improved attenuation of the DAC?s DC offset;

·         Improved stability of the Mirrored integrator to clipping of the output voltage, as compared to the integrator element of a conventional Sigma-delta design.

URV Reference Number: 2-11144-1080
Patent Information:
Computer Hardware
For Information, Contact:
Curtis Broadbent
Licensing Manager
University of Rochester
Mark Bocko
Zeljko Ignjatovic