This is an improvement to a conventional CMOS image sensor, which uses at least 5 transistors per pixel.
The image sensor is applicable to cell phone cameras, digital still cameras, medical instruments, bar code readers, security and surveillance, video cameras, and HDTV cameras.
One niche market where this technology has particular advantage is in security cameras, which require large dynamic range to record images at widely varying light levels. A wireless security camera would require low power usage. Both of these requirements are met by this design.
This image sensor with a pixel-level Sigma-Delta ADC embodies the advantages of both modern over-sampling sigma-delta ADC's and a low transistor count CMOS imager pixel readout circuits. The three or four transistor designs improve the sensor's fill factor, because it reduces the area of the chip devoted to circuitry and makes more available for sensing. Due to the over-sampling nature of the architecture, the transistors can be small to enable high resolution with a high fill-factor. This design can be implemented in modern 0.13-μ processing. Other digital pixel sensors are restricted to larger 0.25-μ processing. The design inherently has high linearity and low power consumption (< 1 nW/pixel). The dynamic range of the design is intrinsically greater than 78 dB, or 13 bits. Dynamic range up to 100 dB (16 bits) can be achieved.